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RTL Level Preparation of High-Quality / Low-Energy / Low-Power BIST

机译：RTL电平准备高质量/低能耗/低功耗BIsT

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M. B. Santos; J. P. Teixeira; S. Manich; R. Rodriguez; J. Figueras;
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年度 2007
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1. Design and Implementation of DFT Technique to Verify LBIST at RTL Level [J] . Nagaraj Vannal, Saroja V Siddamal Advances in Science, Technology and Engineering Systems . 2020,第6期

机译：DFT技术的设计与实现验证LBist在RTL级别
2. AES Datapath Optimization Strategies for Low-Power Low-Energy Multisecurity-Level Internet-of-Things Applications [J] . Duy-Hieu Bui, Diego Puschini, Simone Bacles-Min, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2017,第12期

机译：低功耗，低能耗，多安全级别的物联网应用程序的AES数据路径优化策略
3. On High-Quality, Low Energy Built-in Self Test Preparation at RT-Level [J] . M. B. SANTOS, I. C. TEIXEIRA, J. P. TEIXEIRA, Journal of Electronic Testing: Theory and Applications: Theory and Applications . 2004,第4期

机译：在RT级进行高质量，低能耗的内置自测准备
4. RTL level preparation of high-quality/low-energy/low-power BIST [C] . Santos, M.B., Teixeira, . 2002

机译：高质量/低能耗/低功耗BIST的RTL级准备
5. Detecting RTL Trojans Using Artificial Immune Systems and High Level Behavior Classification [D] . Zareen, Farhath 2019

机译：使用人工免疫系统和高级行为分类检测RTL木马
6. Numerically optimized radiofrequency pulses for robust and low-power cardiovascular T2 preparation at 3T [O] . Ruud B van Heeswijk, Kieran R OBrien, Jean Delacoste, 2014

机译：数值优化的射频脉冲可在3T时实现强大的低功率心血管T2准备
7. TAO-BIST: A Framework for Testability Analysis and Optimization of RTL Circuits for BIST [O] . Srivaths Ravi, Niraj K. Jha, Ganesh Lakshminarayana 2000

机译：TAO-BIST：用于BIST的可测试性分析和RTL电路优化的框架

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