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Utilizing the Effect of Relative Delay on Energy Dissipation in Low-Power On-Chip Buses

机译：利用相对延迟对低功耗片上总线能量耗散的影响

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Maged Ghoneima; Yehea I. Ismail;
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年度 2008
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1. Utilizing the effect of relative delay on energy dissipation in low-power on-chip buses [J] . Ghoneima M., Ismail Y.I. IEEE transactions on very large scale integration (VLSI) systems . 2004,第12期

机译：利用相对延迟对低功耗片上总线的能量耗散的影响
2. Optimal low-power coding for error correction and crosstalk avoidance in on-chip data buses [J] . Chee Yeow Meng, Colbourn Charles J., Ling Alan Chi Hung, Designs, Codes and Crytography . 2015,第2a3期

机译：片上数据总线中用于纠错和避免串扰的最佳低功耗编码
3. Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses [J] . Ghoneima M.M., Khellah M.M., Tschanz J., IEEE transactions on circuits and systems . I , Regular papers . 2008,第7期

机译：倾斜中继器总线：片上总线的低功耗方案
4. Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses [C] . Ghoneima, M., Ismail, . 2005

机译：倾斜相邻的线路中继器，以减少片上总线的延迟和能量消耗
5. Improving the bit-rate, noise performance and power dissipation of on-chip buses. [D] . Ghoneima, Maged M. 2006

机译：改善片上总线的比特率，噪声性能和功耗。
6. Highly efficient blue thermally activated delayed fluorescent OLEDs with record-low driving voltages utilizing high triplet energy hosts with small singlet–triplet splittings [O] . Dongdong Zhang, Minghan Cai, Zhengyang Bin, 2018

机译：高效的蓝色热活化延迟荧光OLED，其驱动电压达到创纪录的低水平，利用高三重态能量主体和小的单重态-三重态分裂
7. Optimization of Delay and Energy in On-Chip Buses using Bus Encoding Technique [O] . Souvik Singha, G. K. Mahanti 2014

机译：利用总线编码技术优化片上总线的延迟和能量
8. Large Tunable Delays in Fiber and On-Chip Via Conversion/Dispersion. [R] . Gaeta, A. L. 2013

机译：通过转换/色散实现光纤和片上大型可调谐延迟。

Utilizing the Effect of Relative Delay on Energy Dissipation in Low-Power On-Chip Buses

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