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Photonic Network-on-Chip Architectures Using Multilayer Deposited Silicon Materials for High-Performance Chip Multiprocessors

机译：采用多层沉积硅材料的光子网络片上结构，用于高性能芯片多处理器

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Aleksandr Biberman; Kyle Preston; Jacob S. Levy; Michal Lipson;
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年度 2011
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1. Photonic Network-on-Chip Architectures Using Multilayer Deposited Silicon Materials for High-Performance Chip Multiprocessors [J] . ALEKSANDR BIBERMAN, KYLE PRESTON, GILBERT HENDRY, ACM Journal on Emerging Technologies in Computing Systems . 2011,第2期

机译：使用多层沉积硅材料的高性能芯片多处理器光子片上网络体系结构
2. Scheduling computation and communication on a software-defined photonic Network-on-Chip architecture for high-performance real-time systems [J] . Temucin Huseyin, Imre Kayhan M. Journal of systems architecture . 2018,第期

机译：用于高性能实时系统的软件定义的光子芯片架构上的计算与通信
3. Hybrid silicon-photonic network-on-chip for future generations of high-performance many-core systems [J] . Ben Ahmed Achraf, Ben Abdallah Abderazek Journal of supercomputing . 2015,第12期

机译：混合硅光子片上网络，用于下一代高性能多核系统
4. CMOS-compatible scalable photonic switch architecture using 3D-integrated deposited silicon materials for high-performance data center networks [C] . Biberman Aleksandr, Hendry Gilbert, Chan Johnnie, 2011 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference . 2011

机译：使用3D集成沉积硅材料的CMOS兼容可扩展光子开关架构，用于高性能数据中心网络
5. Reliable, Energy-efficient, and Secure Silicon Photonic Network-on-Chip Design for Manycore Architectures [D] . Chittamuru, Sai Vineel Reddy. 2018

机译：用于Manycore架构的可靠，节能和安全的硅光子片上网络设计
6. Integration of single photon emitters in 2D layered materials with a silicon nitride photonic chip [O] . Frédéric Peyskens, Chitraleema Chakraborty, Muhammad Muneeb, -1

机译：二维层状材料中的单光子发射器与氮化硅光子芯片的集成
7. CMOS-compatible scalable photonic switch architecture using 3D-integrated deposited silicon materials for high-performance data center networks [O] . Aleksandr Biberman Gilbert Hendry, Kyle Preston, Nicolás Sherwood-droz, 2011

机译：使用3D集成沉积硅材料的CMOS兼容可扩展光子开关架构，用于高性能数据中心网络

Photonic Network-on-Chip Architectures Using Multilayer Deposited Silicon Materials for High-Performance Chip Multiprocessors

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