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Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores

机译：使用深度流水线浮点核心的区域有效算术表达式评估

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Ronald Scrofano; Ling Zhuo; Viktor K. Prasanna;
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年度 2008
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1. Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores [J] . Scrofano R., Ling Zhuo, Prasanna V.K. IEEE transactions on very large scale integration (VLSI) systems . 2008 ,第2期

机译：使用深度流水线浮点核心的面积有效算术表达式评估
2. A pipelined area-efficient and high-speed reconfigurable processor for floating-point FFT/IFFT and DCT/IDCT computations [J] . Wang Mingyu, Wang Fang, Wei Shaojun, Microelectronics journal . 2016 ,第JANa期

机译：用于浮点FFT / IFFT和DCT / IDCT计算的流水线面积高效且可重新配置的处理器
3. A Pipelined 50-mhz CMOS 64-bit Floating-point Arithmetic Processor [J] . Benschneider B.J., Bowhill W.J. IEEE Journal of Solid-State Circuits . 1989 ,第5期

机译：流水线型50MHz CMOS 64位浮点算术处理器
4. Area-Efficient Evaluation of a Class of Arithmetic Expressions Using Deeply Pipelined Floating-Point Cores [C] . Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna International Conference on Engineering of Reconfigurable Systems and Algorithms(ERSA'05); 20050627-30; Las Vegas,NV(US) . 2005

机译：使用深度流水线浮点核心对一类算术表达式进行面积有效的求值
5. Caffeinated FPGAs: FPGA Framework for Training and Inference of Convolutional Neural Networks With Reduced Precision Floating-Point Arithmetic [D] . DiCecco, Roberto. 2018

机译：含咖啡因的FPGA：用于训练和推理卷积神经网络的FPGA框架，具有降低的精度浮点算法
6. Why Mental Arithmetic Counts: Brain Activation during Single Digit Arithmetic Predicts High School Math Scores [O] . Gavin R. Price, Michèle M. M. Mazzocco, Daniel Ansari 2013

机译：为什么算术算术很重要：单位数算术期间的大脑激活可以预测高中数学成绩
7. HIGH-SPEED, AREA-EFFICIENT FPGA-BASED FLOATING-POINT ARITHMETIC MODULES [O] . M. Taher, M. Aboulwafa, A. Abdelwahab, 2006

机译：高速，区域高效的FPGA浮点算术模块
8. Paranoia.Ada: A diagnostic program to evaluate Ada floating-point arithmetic [R] . Hjermstad, Chris 1986

机译：paranoia.ada：评估ada浮点运算的诊断程序

Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores

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