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Just-in-time Instruction Set Extension- Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture

机译：即时指令集扩展 - 基于FpGa的可重构asIp架构的可行性和局限性

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Mariusz Grad; Christian Plessl;
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年度 2014
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1. On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors [J] . Mariusz Grad, Christian Plessl International journal of reconfigurable computing . 2012,第期

机译：基于FPGA的可重构处理器即时指令集扩展的可行性和局限性
2. On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors [J] . Grad Mariusz, Plessl Christian International journal of reconfigurable computing . 2012,第6aaPagea1期

机译：基于FPGA的可重构处理器即时指令集扩展的可行性和局限性
3. On the Feasibility and Limitations of Just-in-Time Instruction Set Extension for FPGA-Based Reconfigurable Processors [J] . Grad Mariusz, Plessl Christian International journal of reconfigurable computing . 2012,第6aaPagea1期

机译：基于FPGA的可重构处理器即时指令集扩展的可行性和局限性
4. Just-in-Time Instruction Set Extension - Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture [C] . Grad Mariusz, Plessl Christian 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum . 2011

机译：即时指令集扩展-基于FPGA的可重配置ASIP架构的可行性和局限性
5. FPGA-Based Reconfigurable Physical Layer Architecture for Wireless Applications [D] . Chacko, James. 2017

机译：用于无线应用的基于FPGA的可重配置物理层架构
6. Understanding Evolutionary Potential in Virtual CPU Instruction Set Architectures [O] . David M. Bryson, Charles Ofria -1

机译：了解虚拟CPU指令集体系结构中的进化潜力
7. Just-in-time processor customization on the feasibility and limitations of FPGA-based dynamically reconfigurable instruction set architectures [O] . Grad Mariusz 2011

机译：实时处理器定制，基于基于FPGA的动态可重配置指令集架构的可行性和局限性
8. Evaluation of DOD Comments Re: 'DOD Instruction 5000.5X, Standard Instruction Set Architectures for Embedded Computers. [R] . 1982

机译：评估DOD评论Re：'DOD指令5000.5X，嵌入式计算机的标准指令集架构。

Just-in-time Instruction Set Extension- Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture

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