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A Technique for High-Speed, Fine-Resolution Pattern Generation and its CMOS Implementation

机译：一种高速，精细分辨率模式生成技术及其CmOs实现

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Gary C. Moyer; Mark Clements; Wentai Liu; Toby Schaffer; Ralph K. Cavin; III;
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年度 2007
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1. High-Speed Current-Mode Logic Amplifier Using Positive Feedback and Feed-Forward Source-Follower Techniques for High-Speed CMOS I/O Buffer [J] . Jong K. Kim, T. S. Kalkur IEEE Journal of Solid-State Circuits . 2005 ,第3期

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2. A Low Duty Cycle Burst-Mode Telemeter Signal Generation Technique for VHF Insect Tracking and Its CMOS Implementation [J] . IEEE transactions on very large scale integration (VLSI) systems . 2020 ,第3期

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3. An STM-16 Frame Termination VLSI With 2.5-Gb/s/Pin Input/Output Buffers: High-Speed and Low-Power Multi- src="/images/tex/26741.gif" alt="mathrm{V}_{rm DD}"> CMOS/SIMOX Techniques [J] . Shibata Nobutaro, Ohtomo Yusuke, Nishisaka Mika, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2015 ,第6期

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4. A technique for high-speed, fine-resolution pattern generation and its CMOS implementation [C] . Moyer, G.C., Clements, . 1995

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5. Design techniques for high-speed low-power flash A/D converters in 0.13μm CMOS technology [D] . Mohtashemi, Darya. 2013

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6. Ecological coherence of diversity patterns derived from classical fingerprinting and Next Generation Sequencing techniques [O] . Angélique Gobet, Antje Boetius, Alban Ramette -1

机译：来自经典指纹和下一代测序技术的多样性模式的生态一致性
7. CMOS design enhancement techniques for RF receivers. Analysis, design and implementation of RF receivers with component enhancement and component reduction for improved sensitivity and reduced cost, using CMOS technology. [O] . Logan Nandi 2010

机译：用于RF接收器的CMOS设计增强技术。使用CMOS技术对具有成分增强和成分减少功能的RF接收器进行分析，设计和实现，以提高灵敏度并降低成本。
8. Latent Failures and Coverage in Fault-Tolerant Systems. A VLSI CMOS Circuit Design Technique to Aid Test Generation [R] . Amer, H. H., McCluskey, E. J. 1986

机译：容错系统中的潜在故障和覆盖。一种用于辅助测试生成的VLsI CmOs电路设计技术

A Technique for High-Speed, Fine-Resolution Pattern Generation and its CMOS Implementation

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