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Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays

机译：通过紧耦合可重构逻辑阵列提高微处理器性能

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Sergej Sawitzki; Achim Gratz; Rainer G. Spallek;
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年度 1998
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4. Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays [C] . International workshop on field-programmable logic and applications . 1998

机译：使用紧密耦合的可重新配置逻辑阵列提高微处理器性能
5. Hiding in Hardware: Increasing System Security using Tightly-Coupled FPGA Logic. [D] . Dahlstrom, Jason. 2016

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7. System Integration of Tightly-Coupled Reconfigurable Processor Arrays and Evaluation of Buffer Size Effects on Their Performance [O] . Vahid Lari, Frank Hannig, Jürgen Teich 2009

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8. Electron Lithography STAR Design Guidelines. Part 3: The Mosaic Transistor Array Applied to Custom Microprocessors. Part 4: Stores Logic Arrays, SLAS Implemented with Clocked CMOS [R] . Trotter, J. D. 1982

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Increasing Microprocessor Performance with Tightly-Coupled Reconfigurable Logic Arrays

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