首页> 外文OA文献 >Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate

【2h】

Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate

机译：半导体衬底上VLsI片上互连的并联导纳参数计算的简便有效方法

页面导航

著录项
引文网络
相似文献
相关主题

著录项

作者
Nauwelaers Karen Maex; H. Ymeri; B. Nauwelaers; Karen Maex; D. De Roest; M. Stucchi;
展开▼
作者单位

展开▼
年度 2002
总页数
原文格式 PDF
正文语种
中图分类

相似文献

外文文献
中文文献
专利

1. Highly accurate analytic model for admittance matrix calculation of vlsi interconnects in cmos technology [J] . HASAN YMERI, BART NAUWELAERS, KAREN MAEX Revue Roumaine des Sciences Techniques. Mecanique Appliquee . 2001,第3期

机译：cmos技术中vlsi互连的导纳矩阵计算的高精度解析模型
2. On the frequency -dependent lien admittance of VLSI interconnect lines on silicon-based semiconductor substrates [J] . H. Ymeri, B. Nuwelaers, K. Maex Microelectronics journal . 2002,第5a6期

机译：硅基半导体衬底上VLSI互连线的频率依赖留置导纳
3. Computer-aided analysis of on-chip interconnects near semiconductor substrate for high-speed VLSI [J] . Zheng-Yu Yuan, Zheng-Fan Li IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2000,第9期

机译：高速VLSI的半导体衬底附近芯片上互连的计算机辅助分析
4. Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate [C] . H. Ymeri, B. Nauwelaers, K. Maex, International conference on computer systems and technologies and workshop for PhD students in computing 2009 . 2009

机译：半导体衬底上VLSI片上互连的并联导纳参数计算的简单有效方法
5. High-frequency impedance extraction of interconnects considering substrate effects and exploration of single-walled carbon nanotubes for future VLSI interconnects. [D] . Srivastava, Navin. 2009

机译：考虑衬底效应的互连线的高频阻抗提取和用于未来VLSI互连线的单壁碳纳米管的探索。
6. Calculation of statistic estimates of kinetic parameters from substrate uncompetitive inhibition equation using the median method [O] . Pedro L. Valencia, Carolina Astudillo-Castro, Diego Gajardo, 2017

机译：使用中位数法从底物非竞争性抑制方程计算动力学参数的统计估计值
7. Analysis of Coplanar On-Chip Interconnects on Lossy Semiconducting Substrates [O] . Ymeri H., Nauwelaers B., Maex K., 2002

机译：有损半导体衬底上共面片上互连的分析

Simple and Efficient Approach for Shunt Admittance Parameters Calculations of VLSI On-Chip Interconnects on Semiconducting Substrate

著录项

引文网络

相似文献

相关主题

期刊订阅