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Nonuniform cache architectures for wire-delay dominated on-chip caches

机译：用于线延迟的非均匀高速缓存架构主导了片上高速缓存

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Changkyu Kim; Doug Burger; Stephen W. Keckler;
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年度 2003
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1. NONUNIFORM CACHE ARCHITECTURES FOR WIRE-DELAY DOMINATED ON-CHIP CACHES [J] . Changkyu Kim, Doug Burger, Stephen W. Keckler IEEE Micro . 2003,第6期

机译：线延迟片上高速缓存的非均匀高速缓存体系结构
2. Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches [J] . Bardine A., Comparetti M., Foglia P., IEEE transactions on very large scale integration (VLSI) systems . 2014,第1期

机译：评估深亚微米动态非均匀缓存体系结构缓存的减少泄漏的替代方法
3. A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-Volatile On-Chip Caches [J] . Mittal Sparsh, Vetter Jeffrey S., Li Dong Parallel and Distributed Systems, IEEE Transactions on . 2015,第6期

机译：管理嵌入式DRAM和非易失性片上高速缓存的体系结构方法的概述
4. An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches [C] . Changkyu Kim, Doug Burger, Stephen W. Keckler International conference on Architectural support for programming languages and operating systems . 2002

机译：自适应，非统一的高速缓存结构，用于占线延迟的片上高速缓存
5. Set-associative history-aided adaptive replacement for on-chip caches. [D] . Simons, Brad. 2016

机译：集关联历史辅助片上缓存的自适应替换。
6. Energy-Efficient Nonuniform Content Edge Pre-Caching to Improve Quality of Service in Fog Radio Access Networks [O] . Yi Cen, Yigang Cen, Ke Wang, 2019

机译：节能非均匀内容边缘预缓存以改善雾无线电接入网的服务质量
7. An adaptive, nonuniform cache structure for wire-delay dominated on-chip caches [O] . Changkyu Kim, Doug Burger, Stephen W. Keckler 2002

机译：自适应，非统一的高速缓存结构，用于占线延迟的片上高速缓存

Nonuniform cache architectures for wire-delay dominated on-chip caches

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