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A Vlsi Architecture For Real-Time Hierarchical Encoding/decoding Of Video Using The Wavelet Transform

机译：用于小波变换的视频实时分层编码/解码的Vlsi架构

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Mohan Vishwanath Computer; Mohan Vishwanath; Chaitali Chakrabarti;
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年度 1994
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2. A high speed, memory efficient line based VLSI architecture for the dual mode inverse discrete wavelet transform of JPEG2000 decoder [J] . Nath Pallab Kumar, Banerjee Swapna Microprocessors and microsystems . 2016,第Feba期

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3. VLSI implementation of 2-D discrete wavelet transform for real-time video signal processing [J] . Chu Yu, Sao-Jie Chen IEEE Transactions on Consumer Electronics . 1997,第4期

机译：二维离散小波变换的VLSI实现，用于实时视频信号处理
4. A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform [C] . Vishwanath, M., Chakrabarti, . 1994

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6. Application of Continuous Wavelet Transform and Convolutional Neural Network in Decoding Motor Imagery Brain-Computer Interface [O] . Hyeon Kyu Lee, Young-Seok Choi 2019

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A Vlsi Architecture For Real-Time Hierarchical Encoding/decoding Of Video Using The Wavelet Transform

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