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3-D ICs: A Novel Chip Design for Improving Deep-Submicrometer Interconnect Performance and Systems-on-Chip Integration

机译：3-D IC：用于改善深亚微米互连性能和片上系统集成的新型芯片设计

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Kaustav Banerjee; Shukri J. Souri; Pawan Kapur; Krishna C. Saraswat;
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年度 2001
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1. Impact of On-Chip Interconnect on the Performance of 3-D Integrated Circuits With Through Silicon Vias: Part I [J] . Vachan Kumar, Hanju Oh, Xuchen Zhang, IEEE Transactions on Electron Devices . 2016 ,第6期

机译：片上互连对通过硅通孔的3D集成电路性能的影响：第一部分
2. Impact of On-Chip Interconnect on the Performance of 3-D Integrated Circuits With Through-Silicon Vias: Part II [J] . Xuchen Zhang, Vachan Kumar, Hanju Oh, IEEE Transactions on Electron Devices . 2016 ,第6期

机译：片上互连对带有硅通孔的3D集成电路性能的影响：第二部分
3. Network-on-Chip Design Guidelines for Monolithic 3-D Integration [J] . Akgun Itir, Stow Dylan, Xie Yuan IEEE Micro . 2019 ,第6期

机译：单片3D集成的片上网络设计准则
4. High-performance interconnect design for systems-on-chip [C] . Krishnamurthy, R.K., Soumyanath, . 1999

机译：片上系统的高性能互连设计
5. Design of Wireless Network-on-Chip for Improving Communication Performance of Many-Core System-on-Chips. [D] . Wang, Yi. 2011

机译：用于改善多核芯片系统通信性能的无线片上网络设计。
6. A Microwave Platform for Reliable and Instant Interconnecting Combined with Microwave-Microfluidic Interdigital Capacitor Chips for Sensing Applications [O] . Juncheng Bao, Gertjan Maenhout, Tomislav Markovic, 2020

机译：用于传感应用的可靠且即时互连的微波平台与微波-微流体叉指电容器芯片的组合
7. Leveraging the geometric properties of on-chip transmission line structures to improve interconnect performance: A case study in 65nm [O] . Shomit Das, Georgios Manetas, Kenneth S. Stevens, 2014

机译：利用片上传输线结构的几何特性来提高互连性能：以65nm为例

3-D ICs: A Novel Chip Design for Improving Deep-Submicrometer Interconnect Performance and Systems-on-Chip Integration

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