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A Unified Scheduling Model for High-Level Synthesis and Code Generation

机译：用于高级综合和代码生成的统一调度模型

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Augusli Kifli; Gert Goossens; Hugo De Man;
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年度 1995
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1. A Unified Scheduling Approach for Power and Resource Optimization With Multiple $V_{mathrm{ dd}}$ or/and $V_{mathrm{ th}}$ in High-Level Synthesis [J] . Cong Hao, Nan Wang, Takeshi Yoshimura IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2017,第12期

机译：在高级综合中具有多个$ V_ {mathrm {dd}} $或/和$ V_ {mathrm {th}} $的功率和资源优化的统一调度方法
2. Global scheduling with code-motions for high-level synthesis applications [J] . Minjoong Rim, Yaw Fann IEEE transactions on very large scale integration (VLSI) systems . 1995,第3期

机译：用于高级综合应用程序的带有代码运动的全局调度
3. Global scheduling with code-motions for high-level synthesisapplications [J] . Minjoong Rim, Yaw Fann, Rajiv Jain IEEE transactions on very large scale integration (VLSI) systems . 1995,第3期

机译：用于高级综合应用程序的带有代码运动的全局调度
4. A unified scheduling model for high-level synthesis and code generation [C] . A. Kifli, G. Goosens, H. De Man European conference on Design and Test . 1995

机译：用于高级综合和代码生成的统一调度模型
5. Coordinated Static and Dynamic Scheduling for High-quality High-level Synthesis [D] . Dai, Steve Haihang 2019

机译：高质量的高级综合的静态和动态协调调度
6. A Unified Model of Performance: Validation of its Predictions across Different Sleep/Wake Schedules [O] . Sridhar Ramakrishnan, Nancy J. Wesensten, Thomas J. Balkin, 2016

机译：统一的性能模型：在不同的睡眠/唤醒时间表中验证其预测
7. Hierarchical conditional dependency graphs as a unifying design representation in the CODESIS high-level synthesis system [O] . Kountouris, Apostolos, Wolinski, Christophe 2000

机译：分层条件依赖图作为CODESIS高级综合系统中的统一设计表示形式
8. The Coder: A Program Module for Code Generation in High-Level Language Compilers. [R] . young,raymond p. 1974

机译：编码器：高级语言编译器中代码生成的程序模块。

A Unified Scheduling Model for High-Level Synthesis and Code Generation

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