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Recursive Bipartitioning of BDDs for Performance Driven Synthesis of Pass Transistor Logic Circuits

机译：BDD的递归划分用于通过驱动晶体管逻辑电路的性能驱动综合

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Rupesh S. Shelar; Sachin S. Sapatnekar;
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年度 2001
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1. Synthesis of Pass Thansistor Logic Circuits Based on Sliced BDD [J] . KENGO TAKATA, SHIN-ICHI INOUE, MASAHIRO NUMA 情報処理学会論文誌 . 1999,第4期

机译：基于切片式BDD的通过式变阻器逻辑电路综合
2. BDD decomposition for delay oriented pass transistor logic synthesis [J] . Shelar R.S., Sapatnekar S.S. IEEE transactions on very large scale integration (VLSI) systems . 2005,第8期

机译：BDD分解用于面向延迟的传输晶体管逻辑综合
3. Performance Modulation in All-Solution-Driven InCaOₓ/HfGdOₓ Thin-Film Transistors and Exploration in Low-Voltage-Operated Logic Circuits [J] . Zhang Chong, He Gang, Wang Wenhao, IEEE Transactions on Electron Devices . 2020,第10期

机译：全解决方案驱动的INCAOₓ/HFGDOₓ薄膜晶体管的性能调制和低压操作逻辑电路的勘探
4. Recursive bipartitioning of BDDs for performance driven synthesis of pass transistor logic circuits [C] . Shelar, R.S., Sapatnekar, . 2001

机译：BDD的递归分割用于性能驱动的传输晶体管逻辑电路综合
5. BDD-based Logic Synthesis of MEM Relay Circuits. [D] . Jiang, Mingzhe. 2013

机译：MEM继电器电路基于BDD的逻辑综合。
6. Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers [O] . Yutaka Majima, Guillaume Hackenberger, Yasuo Azuma, 2017

机译：具有有机和无机混合钝化层的化学组装单电子晶体管上的三输入门逻辑电路
7. BDD decomposition for delay oriented pass transistor logic synthesis [O] . Rupesh S. Shelar, Sachin S. Sapatnekar 2008

机译：用于延迟定向传输晶体管逻辑合成的BDD分解

Recursive Bipartitioning of BDDs for Performance Driven Synthesis of Pass Transistor Logic Circuits

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