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11.3 Low-Power Carry-Select Adder Using Adaptive Supply Voltage Based on Input Vector Patterns

机译：11.3使用基于输入矢量模式的自适应电源电压的低功耗进位选择加法器

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Hiroaki Suzuki; Woopyo Jeong; Kaushik Roy;
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年度 2013
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1. Low-power CMOS OTA input stages and voltage buffers based on adaptive biasing topology [J] . G.-C. Cardarili, G. Ferri, M. Re Microelectronics journal . 2000,第3期

机译：基于自适应偏置拓扑的低功耗CMOS OTA输入级和电压缓冲器
2. Low-Power Motion-Vector Detection VLSI Processor Based on Pass-Gate Logic with Dynamic Supply-Voltage/Clock-Frequency Scaling [J] . Akira MOCHIZUKI, Daisuke NISHINOHARA, Takahiro HANYU IEICE Transactions on Electronics . 2004,第11期

机译：具有动态电源电压/时钟频率缩放比例的通过门逻辑的低功耗运动矢量检测VLSI处理器
3. Investigation and Implementation of an Input-Series Auxiliary Power Supply Scheme for High-Input-Voltage Low-Power Applications [J] . Tao Meng, Yilin Song, Zhongxian Wang, IEEE Transactions on Power Electronics . 2018,第1期

机译：高输入电压低功率应用的输入系列辅助电源方案的研究和实现
4. Low-power carry-select adder using adaptive supply voltage based on input vector patterns [C] . Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy Low Power Electronics and Design, 2004. ISLPED '04 . 2004

机译：根据输入矢量模式使用自适应电源电压的低功耗进位选择加法器
5. Low-power design optimization leveraging multiple threshold and supply voltages. [D] . Kulkarni, Sarvesh Hemchandra. 2006

机译：利用多个阈值和电源电压的低功耗设计优化。
6. Patterns of Selection in Anti-Malarial Immune Genes in Malaria Vectors: Evidence for Adaptive Evolution in LRIM1 in Anopheles arabiensis [O] . Michel A. Slotman, Aristeidis Parmakelis, Jonathon C. Marshall, 2007

机译：疟疾载体中抗疟疾免疫基因的选择模式：阿拉伯按蚊LRIM1适应性进化的证据。
7. A Novel Low Power 8 Bit Adder Unit with Adaptive Supply Voltage [O] . T. Vigneswara, P. Subbarami Reddy . 2006

机译：具有自适应电源电压的新型低功耗8位加法器单元

11.3 Low-Power Carry-Select Adder Using Adaptive Supply Voltage Based on Input Vector Patterns

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