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An Adaptive Low-power Transmission Scheme for On-chip Networks

机译：片上网络的自适应低功耗传输方案

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Frederic Worm; Patrick Thiran; Paolo Ienne; Giovanni De Micheli;
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年度 2002
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1. A Low-Latency and Low-Power Hybrid Scheme for On-Chip Networks [J] . Jiang Guoyue, Li Zhaolin, Wang Fang, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on . 2015,第4期

机译：片上网络的低延迟和低功耗混合方案
2. Adaptive error correction in Orthogonal Latin Square Codes for low-power, resilient on-chip interconnection network [J] . Seung Eun Lee Microelectronics & Reliability . 2013,第3期

机译：正交拉丁方码中的自适应错误校正，用于低功耗，弹性片上互连网络
3. A robust self-calibrating transmission scheme for on-chip networks [J] . Worm F., Ienne P., Thiran P., IEEE transactions on very large scale integration (VLSI) systems . 2005,第1期

机译：片上网络的健壮的自校准传输方案
4. An adaptive low-power transmission scheme for on-chip networks [C] . Frederic Worm, Paolo Ienne, Patrick Thiran, International symposium on System Synthesis . 2002

机译：片上网络的自适应低功耗传输方案
5. Design of low-power and resource-efficient on-chip networks. [D] . Chen, Lizhong. 2014

机译：低功耗和资源节约型片上网络的设计。
6. An Adaptive Network Coding Scheme for Multipath Transmission in Cellular-Based Vehicular Networks [O] . Chenyang Yin, Ping Dong, Xiaojiang Du, 2020

机译：基于蜂窝车辆网络中的多径传输的自适应网络编码方案
7. An Adaptive Low-power Transmission Scheme for On-chip Networks [O] . Frederic Worm, Patrick Thiran, Paolo Ienne, 2002

机译：片上网络的自适应低功耗传输方案

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