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Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets

机译：具有多个测试集的内核的静态引脚映射和SOC测试计划

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Yu Huang; Wu-tung Cheng; Chien-chung Tsai; Nilanjan Mukherjee; Sudhakar M. Reddy;
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年度 2003
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1. Optimization of Test Pin-Count, Test Scheduling, and Test Access for NoC-Based Multicore SoCs [J] . IEEE Transactions on Computers . 2014,第3期

机译：基于NoC的多核SoC的测试引脚数，测试计划和测试访问的优化
2. Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling [J] . Goel Sandeep, Marinissen Erik Jan, Sehgal Anuja, IEEE Transactions on Computers . 2009,第3期

机译：使用分层核心对SoC进行测试：常见的谬误，测试访问优化和测试计划
3. Static Mapping with Dynamic Switching of Multiple Data-Parallel Applications on Embedded Many-Core SoCs [J] . Ittetsu TANIGUCHI, Junya KAIDA, Takuji HIEDA, IEICE transactions on information and systems . 2014,第11期

机译：动态切换嵌入式多核SoC上的多个数据并行应用程序的静态映射
4. Static pin mapping and SOC test scheduling for cores with multiple test sets [C] . Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, . 2003

机译：具有多个测试集的内核的静态引脚映射和SOC测试计划
5. Static Load Capacities from Static Load Tests and Dynamic Load Tests with PDA Monitoring and Capwap Signal Matching [D] . Potipan, Ponthep. 2020

机译：静态负载测试和带有PDA监控和CAPWAP信号匹配的动态负载测试
6. Response Surface Mapping of Neurobehavioral Performance: Testing the Feasibility of Split Sleep Schedules for Space Operations [O] . Daniel J. Mollicone, Hans P.A. Van Dongen, Naomi L. Rogers, -1

机译：神经行为表现的响应面映射：测试用于空间操作的拆分睡眠时间表的可行性
7. Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling [O] . Sandeep Kumar Goel, Erik Jan Marinissen, Anuja Sehgal, 2009

机译：使用分层核心对SoC进行测试：常见的谬误，测试访问优化和测试计划

Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets

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