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Internet-Router Buffered Crossbars Based on Networks on Chip

机译：基于片上网络的Internet路由器缓冲交叉开关

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Kees Goossens; Lotfi Mhamdi Iria Varela Senín;
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年度 2009
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1. Extending the Energy Efficiency and Performance With Channel Buffers, Crossbars, and Topology Analysis for Network-on-Chips [J] . DiTomaso D., Morris R., Kodi A.K., IEEE transactions on very large scale integration (VLSI) systems . 2013,第11期

机译：通过通道缓冲区，交叉开关和片上网络的拓扑分析来扩展能效和性能
2. On-chip training of memristor crossbar based multi-layer neural networks [J] . Hasan Raqibul, Taha Tarek M., Yakopcic Chris Microelectronics journal . 2017,第auga期

机译：基于忆阻器交叉开关的多层神经网络的片上训练
3. Synapse cell optimization and back-propagation algorithm implementation in a domain wall synapse based crossbar neural network for scalable on-chip learning [J] . Kaushik Divya, Sharda Janak, Bhowmik Debanjan Nanotechnology . 2020,第36期

机译：Synapse小区优化和背传播算法在域墙突触的基础横杆神经网络中实现可扩展的片上学习
4. Internet-Router Buffered Crossbars Based on Networks on Chip [C] . Goossens K., Mhamdi L., Senin I.V. Digital System Design, Architectures, Methods and Tools, 2009. DSD '09 . 2009

机译：基于片上网络的Internet路由器缓冲交叉开关
5. Performance modelling and high performance buffer design for the system with network on chip. [D] . Liu, Jin. 2007

机译：具有片上网络的系统的性能建模和高性能缓冲区设计。
6. Compensating Circuit to Reduce the Impact of Wire Resistance in a Memristor Crossbar-Based Perceptron Neural Network [O] . Son Ngoc Truong 2019

机译：补偿电路以减少基于忆阻器交叉开关的感知器神经网络中线电阻的影响
7. Buffered Crossbar Fabrics Based on Networks on Chip [O] . Lotfi Mhamdi, Kees Goossens, Iria Varela Senin 2012

机译：基于片上网络的缓冲交叉开关结构

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