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True Single-Phase Energy-Recovering Logic for Low-Power, High-Speed VLSI

机译：适用于低功耗，高速VLSI的真正单相能量回收逻辑

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Suhwan Kim; Marios C. Papaefthymiou;
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年度 1998
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1. A low-power high-speed true single-phase clock-based divide-by-2/3 prescaler [J] . Wenjian Jiang, Fengqi Yu, Qinjin Huang IEICE Electronics Express . 2017,第1期

机译：低功耗，高速，真正单相基于时钟的2/3分频预分频器
2. Low-power, high-speed dual modulus prescalers based on branch-merged true single-phase clocked scheme [J] . Song Jia, Shilin Yan, Yuan Wang, Electronics Letters . 2015,第6期

机译：基于分支合并的真正单相时钟方案的低功耗，高速双模预分频器
3. High-Speed Low-Power True Single-Phase Clock Dual-Modulus Prescalers [J] . Circuits and Systems II: Express Briefs, IEEE Transactions on . 2011,第3期

机译：高速低功耗真单相时钟双模预分频器
4. True single-phase energy-recovering logic for low-power, high-speed VLSI [C] . Suhwan Kim, Marios C. Papaefthymiou International symposium on Low power electronics and design . 1998

机译：真正的单相能量回收逻辑，适用于低功耗，高速VLSI
5. True single-phase adiabatic circuitry for high-performance, low-energy VLSI. [D] . Kim, Suhwan. 2001

机译：真正的单相绝热电路，用于高性能，低能耗的VLSI。
6. A High-Speed Low-Cost VLSI System Capable of On-Chip Online Learning for Dynamic Vision Sensor Data Classification [O] . Wei He, Jinguo Huang, Tengxiao Wang, 2020

机译：一种高速低成本VLSI系统能够用于动态视觉传感器数据分类的片上在线学习
7. Pipelined DSP Design with a True Single-Phase Energy-Recovering Logic Style [O] . Suhwan Kim, Marios C. Papaefthymiou 1999

机译：具有真正单相能量回收逻辑风格的流水线DSP设计

True Single-Phase Energy-Recovering Logic for Low-Power, High-Speed VLSI

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