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Fabrication Technology for High-Density Josephson Integrated Circuits using Mechanical Polishing Planarization

机译：机械抛光平面化制造高密度约瑟夫森集成电路的技术

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Hideaki Numata Shuichi; Shuichi Nagasawa; Michi Tanaka; Shuichi Tahara;
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年度 1996
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1. Fabrication technology for high-density Josephson integrated circuits using mechanical polishing planarization [J] . Numata H., Nagasawa S. IEEE Transactions on Applied Superconductivity . 1999 ,第2期

机译：使用机械抛光平面化技术制造高密度约瑟夫森集成电路的技术
2. Fabrication technology for high-density Josephson integratedcircuits using mechanical polishing planarization [J] . Numata H., Nagasawa S., Tanaka M., IEEE Transactions on Applied Superconductivity . 1999 ,第2期

机译：机械抛光平面化的高密度约瑟夫森集成电路制造技术
3. Planarization of Josephson junctions for large-scale integrated NbSFQ circuits by mechanical polishing [J] . Satoh T, Hinode K, Akaike H, Physica, C. Superconductivity and its applications . 2004 ,第Pta2期

机译：通过机械抛光对大规模集成NbSFQ电路的约瑟夫森结进行平面化
4. Use of Chemical Mechanical Polishing for Planarization of GaAs Integrated Circuits [C] . Michael Meeder, Jeff Vass, Chuck Duncan, International conference on compound semiconductor MANufacturing TECHnology;CS MANTECH . 2008

机译：使用化学机械抛光对GaAs集成电路进行平面化
5. Integrated modeling of chemical mechanical planarization/polishing (CMP) for integrated circuit fabrication: From particle scale to die and wafer scales. [D] . Luo, Jianfeng. 2003

机译：用于集成电路制造的化学机械平面化/抛光（CMP）的集成模型：从微粒级到芯片级和晶圆级。
6. Manipulating mammalian cell morphologies using chemical-mechanical polished integrated circuit chips [O] . Hassan I. Moussa, Megan Logan, Geoffrey C. Siow, 2017

机译：使用化学机械抛光的集成电路芯片操纵哺乳动物的细胞形态
7. Fabrication Process and Properties of Fully-Planarized Deep-Submicron Nb/Al-AlOx/Nb Josephson Junctions for VLSI Circuits [O] . Tolpygo, Sergey K., Bolkhovsky, Vladimir, Weir, Terence J., 2014

机译：全平面深亚微米的制备工艺及性能用于VLsI电路的Nb / al-alOx / Nb Josephson结

Fabrication Technology for High-Density Josephson Integrated Circuits using Mechanical Polishing Planarization

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