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Integrated High-Level Synthesis and Power-Net Routing for Digital Design under Switching Noise Constraints

机译：开关噪声约束下用于数字设计的集成高级综合和电力网路由

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Alex Doboli; Ranga Vemuri;
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年度 2001
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1. A $148fs_{rms}$ Integrated Noise 4 MHz Bandwidth Second-Order $DeltaSigma$ Time-to-Digital Converter With Gated Switched-Ring Oscillator [J] . Yu W., Kim K., Cho S. Circuits and Systems I: Regular Papers, IEEE Transactions on . 2014,第8期

机译： $ 148fs_ {rms} $ 集成噪声4 MHz带宽二阶 $ DeltaSigma $ 带有门控开关环振荡器的时间数字转换器
2. Relative scheduling under timing constraints: algorithms for high-level synthesis of digital circuits [J] . Ku D.C., De Mitcheli G. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 1992,第6期

机译：时序约束下的相对调度：数字电路的高级综合算法
3. Droplet routing in high-level synthesis of configurable digital microfluidic biochips based on microelectrode dot array architecture [J] . Zhongkai Chen, Daniel Hsiang-Yung Teng, Gary Chung-Jhih Wang, BioChip journal . 2011,第4期

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4. Integrated high-level synthesis and power-net routing for digital design under switching noise constraints [C] . Alex Doboli, Ranga Vemuri, PAlex Doboli, Conference on Design automation . 2001

机译：在开关噪声约束下，用于数字设计的集成高级综合和电源网络路由
5. Background Adaptive Cancellation of Switching Noise in Pipelined Analog-to-Digital Converters [D] . Chang, Nick Chia-Jui 2011

机译：流水线模数转换器中开关噪声的背景自适应消除
6. Near-infrared spectral tomography integrated with digital breast tomosynthesis: Effects of tissue scattering on optical data acquisition design [O] . Kelly Michaelsen, Venkat Krishnaswamy, Brian W. Pogue, -1

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7. Integrated High Level Synthesis and Power Net Routing for Digital Design Under Switching Noise Constraints [O] . Alex Doboli, Ranga Vemuri 2001

机译：开关噪声约束下数字设计的集成高级综合与电网路由
8. Fault-Tolerant Onboard Digital Information Switching and Routing forCommunications Satellites [R] . Shalkhauser, M. J., Quintana, J. A., Soni, N. J., 1993

机译：用于通信卫星的容错车载数字信息交换和路由

Integrated High-Level Synthesis and Power-Net Routing for Digital Design under Switching Noise Constraints

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