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Use of Code Error and Beat Frequency Test Method to Identify Single Event Upset Sensitive Circuits in a 1 GHz Analog to Digital Converter

机译：使用代码错误和拍频测试方法来识别1 GHz模数转换器中的单事件翻转敏感电路

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Kirby Kruckmeyer; Robert L. Rennie; Vishwanath Ramach;
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年度 2012
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1. Use of Code Error and Beat Frequency Test Method to Identify Single Event Upset Sensitive Circuits in a 1 GHz Analog to Digital Converter [J] . Kruckmeyer K., Rennie R.L., Ramachandran V. IEEE Transactions on Nuclear Science . 2008,第4期

机译：使用代码错误和差拍频率测试方法来识别1 GHz模数转换器中的单事件翻转敏感电路
2. A new design methodology for voltage-to-frequency converters (VFCs) circuits suitable for time-based analog-to-digital converters (T-ADCs) [J] . ElGabry Mohammed A., Hassan Ali H., Mostafa Hassan, Analog Integrated Circuits and Signal Processing . 2018,第2期

机译：适用于基于时间的模数转换器的电压到频率转换器（VFC）电路的新设计方法（T-ADC）
3. Design of Digital Circuits Using Inverse-Mode Cascode SiGe HBTs for Single Event Upset Mitigation [J] . Thrivikraman T. K.Wilcox E.Phillips S. D.Cressler J. D.Marshall C.Vizkelethy G.Dodd P.Marshall P. Nuclear Science, IEEE Transactions on . 2010,第6期

机译：使用反模式Cascode SiGe HBT的数字电路设计可缓解单事件扰动
4. Single Event Upset Characterization of GHz Analog to Digital Converters with Dynamic Inputs Using a Beat Frequency Test Method [C] . Kruckmeyer, Kirby, Rennie, . 2007

机译：使用拍频测试方法对具有动态输入的GHz模数转换器的单事件翻转表征
5. Design techniques and implementations of high-speed analog communication circuits: Two analog-to-digital converters and a 3.125Gb/s receiver. [D] . Younis, Ahmed Abdell-Ra'oof. 2001

机译：高速模拟通信电路的设计技术和实现：两个模数转换器和一个3.125Gb / s接收器。
6. Modeling and Experimental Demonstration of a Hopfield Network Analog-to-Digital Converter with Hybrid CMOS/Memristor Circuits [O] . Xinjie Guo, Farnood Merrikh-Bayat, Ligang Gao, 2015

机译：具有混合CMOS /忆阻器电路的Hopfield网络模数转换器的建模和实验演示
7. Single Event Upset Characterization of GHz Analog to Digital Converters with Dynamic Inputs Using a Beat Frequency Test Method [O] . Kirby Kruckmeyer, Robert L. Rennie, Dawn H. Ostenberg, 2012

机译：使用拍频测试方法对具有动态输入的GHz模数转换器的单事件翻转表征

Use of Code Error and Beat Frequency Test Method to Identify Single Event Upset Sensitive Circuits in a 1 GHz Analog to Digital Converter

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