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Multithreaded Virtual-Memory-Enabled Reconfigurable Hardware Accelerators

机译：启用多线程虚拟内存的可重新配置硬件加速器

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Miljan Vuletić; Paolo Ienne; Christopher Claus; Walter Stechele; Technische Universität München;
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年度 2012
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机译：Multi-DataFlow Composer工具：用于优化的粗粒可重新配置硬件加速器和平台设计的开源工具套件
2. Energy-Efficient Reconfigurable Hardware Accelerators for Data-Intensive Applications [J] . Kai Yang, Robert Karam, Swarup Bhunia Journal of Low Power Electronics . 2017,第3期

机译：用于数据密集型应用的节能可重新配置硬件加速器
3. Automatic Generation of Efficient Accelerators for Reconfigurable Hardware [J] . David Koeplinger, Christina Delimitrou, Raghu Prabhakar, Computer architecture news . 2016,第3期

机译：自动生成用于可重配置硬件的高效加速器
4. Multithreaded Virtual-Memory-Enabled Reconfigurable Hardware Accelerators [C] . Miljan Vuletic, Paolo Ienne, Christopher Claus, IEEE International Conference on Field Programmable Technology . 2006

机译：多线程虚拟内存的可重新配置硬件加速器
5. Reconfigurable hardware accelerators for high performance radiation tolerant computers. [D] . Weber, Raymond Joseph. 2014

机译：可重新配置的硬件加速器，用于高性能耐辐射计算机。
6. Boosting Throughput and Efficiency of Hardware Spiking Neural Accelerators Using Time Compression Supporting Multiple Spike Codes [O] . Changqing Xu, Wenrui Zhang, Yu Liu, 2020

机译：使用时间压缩支撑多穗码的硬件尖峰神经加速器的吞吐量和效率
7. Design of OpenCL-compatible multithreaded hardware accelerators with dynamic support for embedded FPGAs [O] . Rodríguez Medina Alfonso, Valverde Alcalá Juan, Torre Arnanz Eduardo de la 2015

机译：动态支持嵌入式FPGA的OpenCL兼容多线程硬件加速器设计

Multithreaded Virtual-Memory-Enabled Reconfigurable Hardware Accelerators

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