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Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply

机译：集成单相电源时钟电源的时钟CMOS绝热逻辑

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M. Vesterbacka; K. Palmkvist; L. Wanhammar; Dragan Maksimović; Vojin G. Oklobdžija; Borivoje Nikolić;
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年度 2008
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1. 5-Gbit/s 0.18-μm CMOS单片集成低功耗时钟恢复电路设计 [J] . 张长春, 王志功, 施思, 东南大学学报（英文版） . 2011,第002期
2. Clocked CMOS adiabatic logic with integrated single-phase power-clock supply [J] . Maksimovic D., Oklobdzija V.G. IEEE transactions on very large scale integration (VLSI) systems . 2000,第4期

机译：具有集成单相电源时钟电源的时钟CMOS绝热逻辑
3. Clocked CMOS adiabatic logic with integrated single-phasepower-clock supply [J] . Maksimovic D., Oklobdzija V.G., Nikolic B., IEEE transactions on very large scale integration (VLSI) systems . 2000,第4期

机译：具有集成单相电源时钟电源的时钟CMOS绝热逻辑
4. Pass-transistor adiabatic logic using single power-clock supply [J] . Oklobdzija V.G., Maksimovic D., Fengcheng Lin IEEE Transactions on Circuits and Systems. II, Express Briefs . 1997,第10期

机译：使用单电源时钟电源的传输晶体管绝热逻辑
5. Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: Experimental results [C] . Dragan Maksimovic, Vojin G.Oklobdzija, Borivoje Nikolic, International symposium on low power electronics and design . 1997

机译：具有集成单相电源时钟电源的时钟CMOS绝热逻辑：实验结果
6. Adiabatic Step-charging Power-clock Generator [D] . ?Khoa, Steven 2020

机译：绝热阶梯充电功率时钟发生器
7. A RRAM Integrated 4T SRAM with Self-Inhibit Resistive Switching Load by Pure CMOS Logic Process [O] . Meng-Yin Hsu, Chu-Feng Liao, Yi-Hong Shih, 2017

机译：采用纯CMOS逻辑工艺的具有自抑制电阻切换负载的RRAM集成4T SRAM
8. Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply [O] . M. Vesterbacka, K. Palmkvist, L. Wanhammar, 2009

机译：具有集成单相电源时钟电源的时钟CmOs绝热逻辑
9. Single-Phase Clocked NOR/NOR CMOS Programmable Sequential Array Structure [R] . Lu, S. L. 1989

机译：单相时钟NOR / NOR CmOs可编程序列阵列结构

Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply

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