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Discrete Vt Assignment and Gate Sizing Using a Self-Snapping Continuous Formulation

机译：使用自捕捉连续公式进行离散Vt分配和门大小调整

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Saumil Shah; Ashish Srivastava; Dushyant Sharma; Dennis Sylvester; David Blaauw; Vladimir Zolotov;
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年度 2008
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2. Continuous Time Formulation and Lagrangian Relaxation Algorithm for the Gate Assignment Problem [J] . Yuan Yuan, Ping Yan, Liqiang Zhao Mathematical Problems in Engineering: Theory, Methods and Applications . 2020,第1期

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3. Efficient Algorithms for Discrete Gate Sizing and Threshold Voltage Assignment Based on an Accurate Analytical Statistical Yield Gradient [J] . Ramprasath S., Vasudevan Vinita ACM Transactions on Design Automation of Electronic Systems . 2016,第4期

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4. Discrete Vt assignment and gate sizing using a self-snapping continuous formulation [C] . Shah, S., Srivastava, . 2005

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5. Post layout validation of discrete gate sizing and VT selection. [D] . Gunturi, Srivatsa Kausthubha Krishna. 2016

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6. Discrete and dynamic scaling of the size of continuous graphic movements of parkinsonian patients and elderly controls [O] . M Longstaff, P Mahant, M Stacy, 2003

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7. A Parallel and Randomized Algorithm for Large-Scale Discrete Dual-Vt Assignment and Continuous Gate Sizing [O] . Low Power Electronics, Tai-hsuan Wu, Lin Xie, 2008

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Discrete Vt Assignment and Gate Sizing Using a Self-Snapping Continuous Formulation

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