首页> 外文OA文献 >6.4 Architecting Voltage Islands in Core-based System-on-a-Chip Designs

【2h】

6.4 Architecting Voltage Islands in Core-based System-on-a-Chip Designs

机译：6.4在基于内核的片上系统设计中设计电压岛

页面导航

著录项
引文网络
相似文献
相关主题

著录项

作者
Jingcao Hu; Youngsoo Shin; Nagu Dhanwada; Radu Marculescu;
展开▼
作者单位

展开▼
年度 2013
总页数
原文格式 PDF
正文语种
中图分类

相似文献

外文文献
中文文献
专利

1. Proton tolerance of multiple-threshold voltage and multiple-breakdown voltage CMOS device design points in a 0.18 /spl mu/m system-on-a-chip CMOS technology [J] . Ying Li, Cressler J.D., Yuan Lu, IEEE Transactions on Nuclear Science . 2003,第6期

机译：采用0.18 / spl mu / m片上系统CMOS技术的多阈值电压和多击穿电压CMOS器件设计点的质子公差
2. A garden born of Vulcan:The Lanzarote home of late architect Cesar Manrique is a remarkable ensemble of design, planting and architecture, set harmoniously within the near-lunar, volcanic landscape of this easternmostCanary Island [J] . David Stevens, Suzie Gibbons The Garden: Journal of the Royal Horticultural Society . 2013,第Pta11期

机译：由沃尔坎（Vulcan）出生的花园：已故建筑师塞萨尔·曼里克（Cesar Manrique）的兰萨罗特岛住宅，是设计，种植和建筑的杰出合奏，和谐地设置在这个最东端的加那利群岛近月牙的火山景观中
3. System Sensor's revamped Voltage Drop Calculator helps architects and engineers design notification circuits [J] . Engineered systems . 2007,第2007期

机译：系统传感器的改进的压降计算器可帮助架构师和工程师设计通知电路
4. Architecting voltage islands in core-based system-on-a-chip designs [C] . Jingcao Hu, Youngsoo Shin, Dhanwada, . 2004

机译：在基于内核的片上系统设计中构建电压岛
5. A low power design methodology with multi-Vdd and voltage islands. [D] . Wu, Huaizhi. 2007

机译：具有多个Vdd和电压岛的低功耗设计方法。
6. Feasibility Study and Design of a Wearable System-on-a-Chip Pulse Radar for Contactless Cardiopulmonary Monitoring [O] . Domenico Zito, Domenico Pepe, Bruno Neri, 2008

机译：非接触式心肺监护的可穿戴式单芯片脉搏雷达的可行性研究与设计
7. Temperature-Aware Voltage Islands Architecting in System-on-Chip Design [O] . W. -l. Hung, G. M. Link, Yuan Xie, 2005

机译：系统级芯片设计中的温度感知电压岛架构
8. Batteryless Electroencephalography (EEG): Subthreshold Voltage System-on-a-Chip (SoC) Design for Neurophysiological Measurement. [R] . Hairston, W. D., Proie, R., Conroy, J., 2015

机译：无电池脑电图（EEG）：用于神经生理学测量的亚阈值电压片上系统（soC）设计。

6.4 Architecting Voltage Islands in Core-based System-on-a-Chip Designs

著录项

引文网络

相似文献

相关主题

期刊订阅