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Synthesis of Four-Phase Asynchronous Control Circuits from Pipeline Dependency Graphs

机译：从流水线依赖图综合四相异步控制电路

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Hiroto Kagotani; Takuji Okamoto; Takashi Nanya;
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年度 2013
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1. Composition of dependency graphs for asynchronous circuit synthesis based on synchronous circuit scheduling [J] . Hiroto Kagotani, Takuji Okamoto, Takashi Nanya Electronics and communications in Japan. Part 3 . 2000,第12期

机译：基于同步电路调度的异步电路综合依赖图的合成
2. Optimized synthesis of asynchronous control circuits from graph-theoretic specifications [J] . Vanbekbergen P., Goossens G. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 1992,第11期

机译：根据图论规范优化异步控制电路的综合
3. Synthesis of hazard-free asynchronous circuits based on characteristic graph [J] . Kuan-Jen Lin, Chi-Wen Kuo IEEE Transactions on Computers . 1997,第11期

机译：基于特征图的无危险异步电路综合
4. Synthesis of four-phase asynchronous control circuits from pipeline dependency graphs [C] . Hiroto Kagotani, Takuji Okamoto, Takashi Nanya, Asia and South Pacific Design Automation Conference . 2001

机译：从流水线依赖图综合四相异步控制电路
5. Gate level pipelining optimization, energy estimation, and design for test techniques for asynchronous null convention circuits using industry-standard design tools. [D] . Satagopan, Venkat Raghavan. 2007

机译：使用行业标准的设计工具，对异步无效约定电路的门级流水线优化，能量估计和测试技术设计。
6. Asynchronous Rate Chaos in Spiking Neuronal Circuits [O] . Omri Harish, David Hansel 2015

机译：尖峰神经元电路中的异步速率混沌
7. High Level Synthesis of Asynchronous Circuits from Data Flow Graphs [O] . Rene Van Leuken, Tom Van Leeuwen, Huib Lincklaen Arriens 2014

机译：基于数据流图的异步电路高级综合
8. Synthesis of Control Circuits in Folded Pipelined DSP Architectures [R] . Parhi, K. K., Wang, C. Y., Brown, A. P. 1992

机译：折叠流水线Dsp架构中控制电路的综合

Synthesis of Four-Phase Asynchronous Control Circuits from Pipeline Dependency Graphs

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