首页> 外文OA文献 >Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study

【2h】

Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study

机译：大型多处理器中硬件和编译器控制的缓存一致性：设计注意事项和性能研究

页面导航

著录项
引文网络
相似文献
相关主题

著录项

作者
Lynn Choi; Pen-Chung Yew;
展开▼
作者单位

展开▼
年度 2007
总页数
原文格式 PDF
正文语种
中图分类

相似文献

外文文献
中文文献
专利

1. Hardware and compiler-directed cache coherence in large-scale multiprocessors: Design considerations and performance study [J] . Choi L., Pen-Chung Yew IEEE Transactions on Parallel and Distributed Systems . 2000,第4期

机译：大型多处理器中硬件和编译器控制的缓存一致性：设计注意事项和性能研究
2. A performance study of cache coherence protocols and write caches for parallel-multithreaded shared-memory multiprocessors [J] . Chao-Chin Wu, Cheng Chen Journal of the Chinese Institute of Engineers . 1998,第1期

机译：并行多线程共享内存多处理器的缓存一致性协议和写缓存的性能研究
3. Hardware approaches to cache coherence in shared-memory multiprocessors. 2 [J] . Tomasevic M., Milutinovic V. IEEE Micro . 1994,第6期

机译：共享内存多处理器中缓存一致性的硬件方法。 2
4. Compiler and hardware support for cache coherence in large-scale multiprocessors [C] . Lynn Choi, Pen-Chung Yew Annual international symposium on Computer architecture;International symposium on Computer architecture . 1996

机译：编译器和硬件支持大型多处理器中的缓存一致性
5. Performance evaluation of TLB consistency solutions in large-scale shared-memory multiprocessors with consistent caches. [D] . Maydeo, Ketan A. 2005

机译：具有一致的高速缓存的大型共享内存多处理器中TLB一致性解决方案的性能评估。
6. Large-Scale Clinical Systems. Large Scale Integrated Ambulatory Care Systems: Design Considerations in the BWH Ambulatory Medical Record: Features for Maximum Acceptance by Clinicians [O] . Jonathan M. Teich, Martha A. Geisler, Debbie E. Cimerman, 1990

机译：大型临床系统。大型综合门诊医疗系统：BWH门诊医疗记录中的设计注意事项：临床医生最大程度接受的功能
7. Hardware-Oriented Cache Management for Large-Scale Chip Multiprocessors [O] . Hammoud Mohammad Hussein 2010

机译：面向大型芯片多处理器的面向硬件的缓存管理
8. Cache group scheme for hardware-controlled cache coherence and the general need for hardware coherence control in large-scale multiprocessors. [R] . Hoag, J. E. 1991

机译：用于硬件控制的高速缓存一致性的高速缓存组方案以及大规模多处理器中硬件一致性控制的一般需求。

Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study

著录项

引文网络

相似文献

相关主题

期刊订阅