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The design, simulation, and fabrication of a BiCMOS VLSI digitally programmable GIC filter

机译:BiCMOS VLSI数字可编程GIC滤波器的设计,仿真和制造

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摘要

This thesis used a previously-designed programmable GIC filter as a basis in which to incorporate a BiCMOS operational amplifier. An NPN bipolar transistor layout was designed and incorporated into an opamp layout, which was a modified version of a CMOS-only design. The BiCMOS opamp was simulated using Silvaco SmartSpice and showed considerable improvement over its CMOS equivalent. Additional improvements were made to the GIC filter to include a passgate with reduced resistance, and a correction was made to the capacitor layout. Simulations were also performed on a switchedcapacitor bilinear resistor and a switched-capacitor variable bilinear resistor. Results from the bilinear resistor simulations require further study and testing. Finally, a VLSI layout of the filter was accomplished using LASI and has been submitted to MOSIS for fabrication.
机译:本文使用先前设计的可编程GIC滤波器作为并入BiCMOS运算放大器的基础。设计了一个NPN双极晶体管布局,并将其合并到运算放大器布局中,该布局是仅CMOS设计的修改版本。使用Silvaco SmartSpice对BiCMOS运算放大器进行了仿真,并显示出与CMOS等效产品相比的显着改进。对GIC滤波器进行了其他改进,以包括具有减小的电阻的门控,并对电容器布局进行了校正。还对开关电容器双线性电阻器和开关电容器可变双线性电阻器进行了仿真。双线性电阻器仿真的结果需要进一步研究和测试。最后,使用LASI完成了滤波器的VLSI布局,并已提交给MOSIS进行制造。

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  • 作者

    Milne Paul R.;

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  • 年度 2001
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