Design of 3 to 5 GHz CMOS low noise amplifier for ultra-wideband (UWB) system

摘要

A single-stage ultra-wideband (UWB) CMOS low noise amplifier (LNA) employing interstage matching inductor on conventional cascode inductive source degeneration structure is presented in this paper. The proposed LNA is implemented in 0.18 μm CMOS technology for a 3 to 5 GHz ultra-wideband system. By careful optimization, an interstage inductor can increase the overall broadband gain while maintaining a low level of noise figure of an amplifier. The fabricated prototype has a measured power gain of +12.7 dB, input return loss of 18 dB, output return loss of 3 dB, reverse isolation of 35 dB, noise figure of 4.5 dB and input IP3 of -1 dBm at 4 GHz, while consuming 17 mW of DC dissipation at a 1.8 V supply voltage.