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A Methodology to Implement Block Ciphers in Reconfigurable Hardware and its Application to Fast and Compact AES RIJNDAEL

机译：在可重构硬件中实现分组密码的方法及其在快速紧凑的AES RIJNDAEL中的应用

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Standaert François-Xavier; Rouvroy Gaël; Quisquater Jean-Jacques; Legat Jean-Didier; Proceedings of FPGA 2003;
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年度 2003
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1. 基于流水线结构的可重构AES算法IP核的硬件实现 [J] . 李冰, 夏克维, 梁文丽东南大学学报（英文版） . 2010,第001期
2. 基于流水线结构的可重构AES算法IP核的硬件实现（英文） [J] . 李冰, 夏克维, 梁文丽东南大学学报：英文版 . 2010,第001期
3. A new compact hardware architecture of S-Box for block ciphers AES and SM4 [J] . Yaoping Liu, Ning Wu, Xiaoqiang Zhang, IEICE Electronics Express . 2017,第11期

机译：用于分组密码AES和SM4的S-Box的新型紧凑硬件架构
4. Design and Implementation of Unified Hardware for 128-Bit Block Ciphers ARIA and AES [J] . Bonseok Koo, Gwonho Ryu, Taejoo Chang, ETRI journal . 2007,第6期

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5. Design and Implementation of Unified Hardware for 128-Bit Block Ciphers ARIA and AES [J] . Bonseok Koo, Gwonho Ryu, Taejoo Chang, ETRI journal . 2007,第6期

机译：128位块密码ARIA和AES的统一硬件的设计和实现
6. A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES RIJNDAEL [C] . Francois-Xavier Standaert, Gael Rouvroy, Jean-Jacques Quisquater, ACM/SIGDA international symposium on Field programmable gate arrays . 2003

机译：在可重构硬件中实现分组密码的方法及其在快速紧凑的AES RIJNDAEL中的应用
7. Compact hardware implementation of block ciphers with concurrent error detection [D] . Cheng, Huiju 2007

机译：具有并发错误检测功能的分组密码的紧凑硬件实现
8. Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications [O] . Ferhat Canbay, Vecdi Emre Levent, Gorkem Serbes, 2016

机译：代码生成器用于在移动应用程序的可重构体系结构上实现双树复数小波变换
9. A Methodology to Implement Block Ciphers in Reconfigurable Hardware and its Application to Fast and Compact AES RIJNDAEL [O] . François-xavier St, Gael Rouvroy, Jean-jacques Quisquater, 2013

机译：可重构硬件中实现分组密码的方法及其在快速紧凑型aEs RIJNDaEL中的应用
10. Recommendation for Block Cipher Modes of Operation: The XTS-AES Mode for Confidentiality on Storage Devices [R] . Dworkin, M. 2010

机译：块密码操作模式的建议：存储设备机密性的XTs-aEs模式

A Methodology to Implement Block Ciphers in Reconfigurable Hardware and its Application to Fast and Compact AES RIJNDAEL

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