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An Efficient WCET-Aware Instruction Scheduling and Register Allocation Approach for Clustered VLIW Processors

机译：集群式VLIW处理器的高效WCET感知指令调度和寄存器分配方法

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Su X; Wu H; Xue J;
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1. WCET-Aware Re-Scheduling Register Allocation for Real-Time Embedded Systems With Clustered VLIW Architecture [J] . Huang Y., Shi L., Li J., IEEE transactions on very large scale integration (VLSI) systems . 2014,第1期

机译：具有群集VLIW架构的实时嵌入式系统的WCET感知重新调度寄存器分配
2. WCET-aware Re-scheduling Register Allocation for Real-time Embedded Systems with Clustered VLIW Architecture [J] . Yazhi Huang, Mengying Zhao, Chun Jason Xue ACM SIGPLAN Notices: A Monthly Publication of the Special Interest Group on Programming Languages . 2012,第5期

机译：具有群集VLIW架构的实时嵌入式系统的WCET感知重新调度寄存器分配
3. Optimizing Instruction Scheduling and Register Allocation for Register-File-Connected Clustered VLIW Architectures [J] . HaijingTang, XuYang, SiyeWang, ScientificWorldJournal . 2013,第3期

机译：优化寄存器文件连接群集VLIW体系结构的指令调度和寄存器分配
4. An efficient heuristic for instruction scheduling on clustered VLIW processors [C] . Zhang Xuemeng, Wu Hui, Xue Jingling 2011 Proceedings of the 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems . 2011

机译：在集群VLIW处理器上进行指令调度的有效启发式方法
5. VLIW processors: Efficiently exploiting instruction level parallelism. [D] . Rudd, Kevin William. 2000

机译：VLIW处理器：有效利用指令级并行性。
6. Optimizing Instruction Scheduling and Register Allocation for Register-File-Connected Clustered VLIW Architectures [O] . Haijing Tang, Xu Yang, Siye Wang, 2013

机译：连接寄存器文件的集群式VLIW架构的优化指令调度和寄存器分配
7. A unified approach to instruction scheduling and register allocation on clustered VLIW processors [O] . Zhang Xuemeng Computer Science Engineering Faculty of Engineering UNSW 2013

机译：集群VLIW处理器上用于指令调度和寄存器分配的统一方法

An Efficient WCET-Aware Instruction Scheduling and Register Allocation Approach for Clustered VLIW Processors

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