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Synthesis of Translinear Analog Signal Processing Systems

机译:跨线性模拟信号处理系统的综合

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摘要

Even in the predominantly digital world of today, analog circuits maintain a significant and necessary role in the way electronic signals are generated and processed. A straightforward method for synthesizing analog circuits would greatly improve the way that analog circuits are currently designed. In this dissertation, I build upon a synthesis methodology for translinear circuits originally introduced by Bradley Minch that uses multiple-input translinear elements (MITEs) as its fundamental building block. Introducing a graphical representation for the way that MITEs are connected, the designer can get a feel for how the equations relate to the physical circuit structure and allows for a visual method for reducing the number of transistors in the final circuit. Having refined some of the synthesis steps, I illustrate the methodology with many examples of static and dynamic MITE networks. For static MITE networks, I present a squaring reciprocal circuit and two versions of a vector magnitude circuit. A first-order log-domain filter and an RMS-to-DC converter are synthesized showing two first-order systems, both linear and non-linear. Higher order systems are illustrated with the synthesis of a second-order log-domain filter and a quadrature oscillator. The resulting circuits from several of these examples are combined to form a phase-locked loop (PLL). I present simulated and experimental results from many of these examples. Additionally, I present information related to the process of programming the floating-gate charge for the MITEs through the use of Fowler-Nordheim tunneling and hot-electron injection. I also include code for a Perl program that determines the optimum connections to minimize the total number of MITEs for a given circuit.
机译:即使在当今以数字为主的世界中,模拟电路在电子信号的生成和处理方式中也扮演着重要的角色。一种简单的合成模拟电路的方法将大大改善当前设计模拟电路的方式。在本文中,我基于Bradley Minch最初提出的跨线性电路的综合方法,该方法使用多输入跨线性元件(MITE)作为其基本构件。通过以图形表示形式介绍MITE的连接方式,设计人员可以了解这些方程式与物理电路结构的关系,并可以通过可视化方法减少最终电路中的晶体管数量。在完善了一些综合步骤之后,我将通过许多静态和动态MITE网络示例来说明该方法。对于静态MITE网络,我提出了平方倒数电路和矢量幅度电路的两种版本。合成了一个一阶对数域滤波器和一个RMS-DC转换器,显示了两个线性和非线性一阶系统。结合了二​​阶对数域滤波器和正交振荡器说明了高阶系统。这些示例中的几个示例所产生的电路被组合起来以形成锁相环(PLL)。我提供了许多这些示例的模拟和实验结果。此外,我介绍了有关通过使用Fowler-Nordheim隧穿和热电子注入为MITE编程浮栅电荷的过程的信息。我还包括用于Perl程序的代码,该代码确定最佳连接以最大程度减少给定电路的MITE总数。

著录项

  • 作者

    McDonald Eric John;

  • 作者单位
  • 年度 2004
  • 总页数
  • 原文格式 PDF
  • 正文语种 en_US
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