Using multi time-scale electro-thermal simulation approach to evaluate SiC-MOSFET power C=converter in virtual prototyping design tool

摘要

Using virtual prototyping (VP) design tool to eval¬uate power converter electro-thermal performance can help designers to validate prototype in a quick way. However, different system time-scale requires efficient electro-thermal simulation techniques. Thus, an approach by using average power losses of one switching cycle is presented in the paper to decouple electrical and thermal simulation so as to evaluate the influence of the parasitic inductance on device junction temperature quickly. This approach is validated by comparing with a method to obtain device junction temperature by using instantaneous power losses. By implementing it in the VP design tool, where a SiC-MOSFET behavioural model is developed and validated, it is shown the parasitic inductance influence on power converter electro-thermal waveforms. Thus, designers can evaluate power converter electro-thermal performance more quickly than other commercial software.