Les optimisations d'algorithmes de traitement de signal sur les architectures modernes parallèles et embarquées

摘要

This thesis deals with the methods of optimization of signal processing algorithms for parallel architectures of embedded processors. The state of the art of the different architectures destined for embedded environment allows to point all the different available ways of optimization out. A particular attention is paid on effective solutions for intensive floating point calculations. The result is a list of common and different solutions between concurrent solutions. The choice of Fast Fourier Transform algorithm, as representative algorithm for signal processing applications, allows to detail, step by step, the different optimization choices in the case of an implementation on a PowerPC 970FX. It is showed how, from a radix-2 algorithm, it is possible to reduce to the smaller complexion with the use of fused multiplication addition instruction. Finally, we propose a method of multi-architectures generation which takes advantages of the previous work. The purpose is to optimize the execution pipeline through software pipelining.