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FPGA implementation of basic pipeline encoder of video codec Daala

机译:视频编解码器Daala基本流水线编码器的FPGA实现

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摘要

Almost everyone in the world uses video compression many times each day - whether when watching show on TV, clips on the Internet or movies at the cinema. So it is not a surprise that through the history of computer science a number of different video codecs have been developed, each bringing some novel approaches to video processing.ud udDaala video codec is one of the newest video codecs still in development. It is important as it uses nonstandard algorithms for video processing. It uses the Haar transform and the DCT lapped transform for crossing into frequency domain and type of arithmetic coding for coding of output data.ud udIn this work a hardware implementation of basic pipeline of video codec Daala has been developed. The aim of this work was to study possibilities of such implementation and to find possible shortcomings.ud udImplementation has been prepared for FPGA chip where it was tested. The implementation has been finalized and has been found to use appropriate number of FPGA resources, but does not meet intended speed because of sub-optimal implementation.ud udIt has been showen that basic pipeline of video codec Daala is appropriate for usage in FPGA chips as it does not use building blocks that are impossible to implement in hardware. It has been also showen that there are some limitations. Algorithms need full data of the whole superblock to function, so all data need to be stored for each step of the pipeline.ud udVideo codec Daala is still in development and such not appropriate for the general usage as some functions of the codec are not working. Splitting of superblock into blocks is not working if RDO optimization is disabled as current development is using this optimization. Development of arithmetic coding is also not finished because of this large number of compression methods that are available and which complicate implementation.ud udThis implementation of basic pipeline of video codec Daala confirms possibility of its practical implementation and is a first step to full and more optimized implementation that would be appropriate for general usage.ud
机译:世界上几乎每个人每天都多次使用视频压缩-无论是在电视上观看节目,在互联网上播放剪辑还是在电影院看电影。因此,在计算机科学的历史中,已经开发了许多不同的视频编解码器,每一个都带来了一些新颖的视频处理方法,这不足为奇。 ud udDaala视频编解码器是仍在开发中的最新视频编解码器之一。这很重要,因为它使用非标准算法进行视频处理。它使用Haar变换和DCT重叠变换进入频域,并使用算术编码类型对输出数据进行编码。 ud ud在本文中,开发了视频编解码器Daala基本流水线的硬件实现。这项工作的目的是研究这种实现的可能性并发现可能的缺点。 ud ud已经为在其上进行测试的FPGA芯片准备了实现。该实现已完成,已发现使用了适当数量的FPGA资源,但由于实现次优而无法达到预期的速度。 ud ud已显示视频编解码器Daala的基本管道适用于FPGA芯片,因为它不使用无法在硬件中实现的构造块。还表明存在一些限制。算法需要整个超级块的全部数据才能起作用,因此需要为流水线的每一步存储所有数据。 ud ud视频编解码器Daala仍在开发中,由于编解码器的某些功能正在开发中,因此不适合一般用法。不工作。如果禁用RDO优化,则无法将超级块拆分为块,因为当前开发正在使用此优化。由于存在大量可用的压缩方法并使实现变得复杂,因此算术编码的开发也尚未完成。 ud ud视频编解码器Daala的基本流水线的这种实现确认了其实际实现的可能性,这是完成和简化视频编码的第一步。适用于一般用法的更优化的实现。 ud

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    Kragelj Peter;

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