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An FPGA Based Controller for a MEMS Tri-mode FMCW Radar

机译:MEMS三模FMCW雷达的基于FPGA的控制器

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摘要

In this thesis a Xilinx Virtex 5 FPGA platform based signal processing algorithm has been developed and experimentally verified for use in a MEMS based tri-mode 77GHz FMCW automotive radar to determine range and velocity of targets in the vicinity of a host vehicle. The Xilinx Virtex 5 FPGA based signal processing and control algorithm dynamically reconfigures a MEMS based FMCW radar to provide a short, medium, and long-range coverage using the same hardware. The MEMS radar comprises of MEMS SP3T RF switches, microfabricated Rotman lens and a microstrip antenna embedded with MEMS SPST switches, in additional to other microelectronic components. A CA-CFAR module has been used to eliminate false targets in a multi target clutter affected scenario. The refresh rate for the current design is 2.048ms for each mode of radar which is nearly 40 times lower than the BOSCH LRR3. The maximum percent difference from analytical to HDL calculated range values was found to be 0.16% which can be lowered with further refinement. The developed FPGA based radar signal processing algorithm can be implemented as an ASIC which can be batch fabricated to lower down the production cost so that automotive radars can become a standard item for all the vehicles on the road.
机译:在本文中,开发了基于Xilinx Virtex 5 FPGA平台的信号处理算法,并进行了实验验证,可用于基于MEMS的三模77GHz FMCW汽车雷达中,以确定宿主车辆附近目标的范围和速度。基于Xilinx Virtex 5 FPGA的信号处理和控制算法可动态地重新配置基于MEMS的FMCW雷达,以使用相同的硬件提供短,中和远程覆盖。除其他微电子组件外,MEMS雷达还包括MEMS SP3T RF开关,微加工的Rotman透镜和嵌入MEMS SPST开关的微带天线。在多目标杂波影响的情况下,CA-CFAR模块已用于消除虚假目标。当前设计的刷新率对于每种模式的雷达为2.048ms,比BOSCH LRR3低近40倍。发现从分析值到HDL计算范围值的最大百分比差异为0.16%,可以通过进一步完善来降低。可以将开发的基于FPGA的雷达信号处理算法实现为ASIC,可以批量制造该ASIC以降低生产成本,从而使汽车雷达可以成为道路上所有车辆的标准装备。

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    Zereen Sabrina;

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  • 年度 2013
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