Cache memory performance is an important factor in determining overall processor performance. In a multi core processor, concurrent processes resides in main memory uses a shared cache. The shared cache memory reduces the access time, bus overhead, delay and improves processor utilization. We have analyzed the variation of shared cache size and its associativity over hit rate, effective access rate and efficiency in single, dual and quad core processor using multi2sim with splash-2 benchmark. We have proposed a novel cache configuration for a single, dual and quad core system. This research also suggests a new Bit set insertion, replacement policy for thrashing access pattern for dual and quad core system. The Bit set insertion policy considering the miss rate with the shared cache of size = 128kb is reduced by 15 % for FFT application and 20 % for LU when compared with the Least Recently Used cache replacement policy in a dual core system. For quad core system for the shared cache of size=512 KB, the miss rate is reduced by 21 % for FFT application and 24 % for LU decomposition over Least Recently Used cache replacement policy using multi2sim with splash-2.
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