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A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platforms

机译：多处理器片上系统平台的系统级处理器/通信协同开发方法

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Wieferink Andreas; Dörper M.; Leupers Rainer; Ascheid Gerd; Meyr Heinrich; Kogel Tim; Braun Gunnar; Nohl Achim;
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年度 2005
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原文格式 PDF
正文语种 eng
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1. Parallel Processing of Sequential Media Algorithms on Heterogeneous Multi-Processor System-on-Chip [J] . Peng Zhao, Dawei Wang, Ming Yan, Journal of Computers . 2009,第6期

机译：异构多处理器系统上顺序媒体算法的并行处理
2. COSPIM: A Parallelizing System for a High-Performance Multi-Processor System-on-Chip Architecture [J] . SLO-LI CHU WSEAS Transactions on Computers . 2006,第11期

机译：COSPIM：高性能多处理器片上系统架构的并行化系统
3. Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processors Platforms [J] . Microelectronics reliability . 2008,第10期

机译：支持片上网络的多处理器平台的集成系统级建模
4. A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platforms [C] . Andreas Wieferink, Tim Kogel, Rainer Leupers, 1st workshop on modules and libraries for proof assistants 2009 . 2009

机译：多处理器片上系统平台的系统级处理器/通信协同开发方法
5. A system-level platform-based multi-core system-on-chip simulation framework with retargetable processing element models. [D] . Xi, Jinwen. 2007

机译：具有可重定位处理元素模型的基于系统级平台的多核片上系统仿真框架。
6. Process reengineering: The role of a planning methodology and picture archiving and communications system team building [O] . John A. Carrino, Paul J. Unkel, Philip Shelton, 1999

机译：流程再造：规划方法和图片存档及通信系统团队建设的作用
7. A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platforms [O] . Andreas Wieferink, Tim Kogel, Rainer Leupers, 2004

机译：多处理器片上系统平台的系统级处理器/通信协同开发方法

A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platforms

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