A Reliability Prediction Method for Phase-Change Devices Using Optimized Pulse Conditions

摘要

Owing to the outstanding device characteristics of Phase-Change Random Access Memory (PCRAM) such as high scalability, high speed, good cycling endurance, and compatibility with conventional complementary metal-oxide-semiconductor (CMOS) processes, PCRAM has reached the point of volume production. However, due to the temperature dependent nature of the phase-change memory device material and the high electrical and thermal stresses applied during the programming operation, the standard methods of high-temperature (Temperature u3e 125 °C) accelerated retention testing may not be able to accurately predict bit sensing failures or determine slight pulse condition changes needed if the device were to be programmed at an elevated temperature several times, in an environment where the ambient temperature is between 25 and 125 °C. In this work a new reliability prediction method, different than standard PCRAM reliability methods is presented. This new method will model and predict a single combination of temperature and pulse conditions for temperatures between 25 and 125 °C, giving the lowest Bit Error Rate (BER). The prediction model was created by monitoring the cell resistance distributions collected from sections of the PCRAM 1Gigabit (Gb) array after applying a given RESET or SET programming pulse shape at a given temperature, in the range of 25 to 125 °C. This model can be used to determine the optimal pulse conditions for a given ambient temperature and predict the BER and/or data retention loss over large arrays of devices on the Micron/Numonyx 45nm PCRAM part.