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Low-power LVDS for digital readout circuits

机译:用于数字读出电路的低功耗LVDS

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摘要

This paper presents a mixed-signal LVDS driver in 90 nm CMOS technology. The designed LVDS core is to be used as a data link between Infrared Focal Plane Array (IRFPA) detector end and microprocessor input. Parallel data from 220 pixels of IRFPA is serialized by LVDS driver and read out to microprocessor. It also offers a reduced power consumption rate, high data transmission speed and utilizes dense placement of devices for area efficiency. The entire output driver circuit including input buffer draws 5mA while the output swing is 500mV at power supply of 1.2V for data rate of 6.4Gbps. Total LVDS chip area is 0.79 mm(2). Due to these features, the designed LVDS driver is suitable for purposes such as portable, high-speed imaging.
机译:本文介绍了采用90 nm CMOS技术的混合信号LVDS驱动器。设计的LVDS内核将用作红外焦平面阵列(IRFPA)检测器端与微处理器输入之间的数据链路。 LVDS驱动器将来自IRFPA的220个像素的并行数据串行化,并读出到微处理器。它还降低了功耗,提高了数据传输速度,并利用密集放置的设备来提高面积效率。包括输入缓冲器在内的整个输出驱动器电路在1.2V电源下以6.4Gbps的数据速率在输出摆幅为500mV时消耗5mA电流。 LVDS芯片的总面积为0.79 mm(2)。由于这些功能,设计的LVDS驱动器适用于诸如便携式高速成像之类的目的。

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