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Modeling and optimization of BiCMOS embedded through-silicon vias for RF-grounding

机译：用于射频接地的BiCMOS嵌入式硅通孔的建模和优化

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Wietstruck M.; Kaynak M.; Marschmeyer M.; Wipf C.; Tekin İbrahim; Tekin Ibrahim; Zoschke K.; Tillack B.;
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年度 2013
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正文语种 {"code":"en","name":"English","id":9}
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4. Modeling and optimization of BiCMOS embedded through-silicon vias for RF-grounding [C] . Wietstruck M., Kaynak M., Marschmeyer S., IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in Rf Systems . 2014

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7. Optimized lithography process for through-silicon vias-fabrication using a double-sided (structured) photomask for mask aligner lithography [O] . Weichelt, Tina, Stürzebecher, Lorenz, Zeitner, Uwe D. 2015

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Modeling and optimization of BiCMOS embedded through-silicon vias for RF-grounding

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