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Impact of Scaling Gate Insulator Thickness on the Performance of Carbon Nanotube Field Effect Transistors (CNTFETs)

机译:缩放栅绝缘子的厚度对碳纳米管场效应晶体管(CNTFET)性能的影响

摘要

As scaling down Si MOSFET devices degrade device performance in terms of short channel effects. Carbon nanotube field effect transistor (CNTFET) is one of the novel nanoelectronics devices that overcome those MOSFET limitations. The carbon nanotube field effect transistors (CNTFETs) have been explored and proposed to be the promising candidate for the next generation of integrated circuit (IC) devices. To explore the role of CNTFETs in future integrated circuits, it is important to evaluate their performance. However, to do that we need a model that can accurately describe the behavior of the CNTFETs so that the design and evaluation of circuits using these devices can be made. In this paper, we have investigated the effect of scaling gate insulator thickness on the device performance of cylindrical shaped ballistic CNTFET in terms of transfer characteristics, output characteristics, average velocity, gm/Id ratio, mobile charge, quantum capacitance/insulator capacitance, drive current (Ion), Ion / Ioff ratio, transconductance, and output conductance. We concluded that the device metrics such as Ion, Ion / Ioff ratio, transconductance, and output conductance increases with the decrease in gate insulator thickness. Also, we concluded that the gate insulator thickness reduction causes subthreshold slope close to the theoretical limit of 60 mV/decade and DIBL close to zero at room temperature.When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/31008
机译:随着Si MOSFET器件的缩小,就短沟道效应而言,它们会降低器件的性能。碳纳米管场效应晶体管(CNTFET)是克服了MOSFET局限性的新型纳米电子器件之一。已经探索并提出碳纳米管场效应晶体管(CNTFET)是下一代集成电路(IC)器件的有希望的候选者。为了探索CNTFET在未来集成电路中的作用,重要的是评估其性能。但是,要做到这一点,我们需要一个可以准确描述CNTFET行为的模型,以便可以设计和评估使用这些器件的电路。在本文中,我们从转移特性,输出特性,平均速度,gm / Id比,移动电荷,量子电容/绝缘体电容,驱动器等方面研究了缩放栅绝缘体厚度对圆柱形弹道CNTFET器件性能的影响。电流(Ion),离子/ Ioff比,跨导和输出电导。我们得出的结论是,随着栅绝缘体厚度的减小,诸如Ion,Ion / Ioff比,跨导和输出电导之类的器件指标会增加。同样,我们得出的结论是,降低栅极绝缘体的厚度会导致亚阈值斜率接近理论极限60 mV /十倍,而DIBL在室温下接近零。当引用本文时,请使用以下链接http://essuir.sumdu .edu.ua / handle / 123456789/31008

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