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Sub-micron Junction Termination for 1200V Class Devices toward CMOS Process Compatibility

机译:面向CMOS工艺兼容性的1200V类器件的亚微米级结终端

摘要

This study shows, for the first time, possibility of very shallow junction termination in submicron scale. The 2D-TCAD simulations unveil even 0.2μm junction depth structures are capable of blocking 1200V and usability for power devices with more than two hundreds of guard rings. Very shallow structure has robustness against diffusion depth deviation by special guard ring arrangement.
机译:这项研究首次显示了亚微米级极浅结终止的可能性。 2D-TCAD仿真揭示了甚至0.2μm的结深结构也能够阻断1200V电压,并适用于具有两百多个保护环的功率器件。非常浅的结构通过特殊的保护环布置具有抵抗扩散深度偏差的鲁棒性。

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