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Evaluation of the hierarchical temporal memory soft computing platform and its VLSI architecture

机译:分层时态存储器软计算平台及其VLSI架构的评估

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摘要

A large number of real world applications, like user support systems, can still not be performed easily by conventional algorithms in comparison with the human brain. Recently, such intelligence has often been reached by using probability based systems. This paper presents results on the implementation of one such user support system, namely an intention estimation information appliance system, on a Bayesian network as well as hierarchical temporal memory. The latter is a new and quite promising soft computing platform modelling the human brain, though currently only available as a software model. A second part of the paper therefore focuses on a possible VLSI architecture for hierarchical temporal memory. Since it models the human brain, communication as well as memory are of high importance for this VLSI architecture.
机译:与人脑相比,常规算法仍然无法轻松地执行许多现实世界中的应用程序,例如用户支持系统。近来,常常通过使用基于概率的系统来达到这种智能。本文介绍了在贝叶斯网络以及分层时间存储器上实现这样一种用户支持系统(即意图估计信息设备系统)的结果。后者是一个新的并且很有希望的软计算平台,它可以对人的大脑进行建模,尽管目前只能作为软件模型使用。因此,本文的第二部分重点介绍了用于分层时间存储器的可能的VLSI体系结构。由于它可以对人脑进行建模,因此通信和内存对于此VLSI架构都至关重要。

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  • 年度 2009
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  • 原文格式 PDF
  • 正文语种 {"code":"en","name":"English","id":9}
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