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Low Loss On-chip passive components for Si-MMIC by using CPW structure

机译:使用CPW结构的Si-MMIC低损耗片上无源元件

摘要

Si-MMIC's become the key components to realize low cost single chip RF sections for mobile communication terminals. To realize on-chip matching Si-MMIC's, there is a problem of high-loss on-chip passive components due to the dielectric loss of Si substrates. In the conventional Si-IC process used for analog/digital IC production, low resisivity Si substrates have been used, and it is difficult to change to high resistivity Si substrates. Based on electro-magnetic simulation, the loss reduction effect by using coplanar waveguide (CPW) structure is analyzed for low resistivity Si substrates. The measured results of transmission lines and on-chip spiral inductors show the superiority of CPW over microstrip line (MS).
机译:Si-MMIC已成为实现用于移动通信终端的低成本单芯片RF部分的关键组件。为了实现片上匹配Si-MMIC,由于Si衬底的介电损耗,存在高损耗的片上无源元件的问题。在用于模拟/数字IC生产的常规Si-IC工艺中,已经使用了低电阻率的Si衬底,并且难以改变为高电阻率的Si衬底。基于电磁仿真,分析了低电阻率Si基板通过共面波导(CPW)结构的损耗降低效果。传输线和片上螺旋电感器的测量结果表明,CPW优于微带线(MS)。

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