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Decoding and decision circuits for high speed multi-level transmission

机译:高速多级传输的解码和决策电路

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摘要

High speed decoding and decision ICs for 4-level ETDM fibre optic transmission systems are presented. The circuits were fabricated in a InP/lnGaAs HBT technology with Ft = 53 GHz and Fmax = 40 GHz. A 4-level decoding circuit using a mux core architecture and a binary decision circuit were designed and measured. The potential performance of the decoder were experimentally assessed up to 16 GBaud (32 Gbit/s) (input data). The decision circuit is a D MSFF which was tested up to 22 Gbit/s.
机译:提出了用于4级ETDM光纤传输系统的高速解码和决策IC。电路采用InP / InGaAs HBT技术制造,Ft = 53 GHz,Fmax = 40 GHz。设计并测量了使用多核核心架构的4级解码电路和二进制判决电路。通过实验评估了解码器的潜在性能,最高可达到16 GBaud(32 Gbit / s)(输入数据)。判决电路是D MSFF,已经测试了高达22 Gbit / s的速度。

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