Low Power Single-Ended Active Frequency Doubler for a 60 GHz-Band Application

摘要

The design and characterization of a 28-56 GHz frequency doubler based on a commercial foundry GaAs pHEMT process is described. To realize low power consumption and high conversion gain with small input power at the same time, we employed a simple circuit topology composed of a single-ended active frequency doubler and a frequency selective buffer amplifier. The doubler chip occupies 2 mm 2 chip area and delivers 4 dBm with an input power of 0 dBm. The excellent unwanted harmonics suppression of 29 dB and low power operation of 40 mW were obtained.