Floating-Point Division Operator based on CORDIC Algorithm

摘要

Design and evaluation of a CORDIC (COordinateudRotation DIgital Computer) algorithm for a ???oatingpointuddivision operation is presented in this paper. Inudgeneral, division operation based on CORDIC algorithmudhas a limitation in term of the range of inputsudthat can be processed by the CORDIC machine toudgive proper convergence and precise division operationudresult. A hardware architecture of CORDIC algorithmudcapable of processing broader input rangesudis implemented and presented in this paper by usinguda pre-processing and a post-processing stage. Theudperformance as well as the calculation error statisticsudover exhaustive sets of input tests are evaluated.udThe results show that the CORDIC algorithm canudbe well-convergence and gives precise division operationudresults with broader input ranges. The proposedudhardware architecture is modeled in VHDL and synthesizedudon a CMOS standard-cell technology and audFPGA device, resulting 1 GFlops on the CMOS andud210.812 MFlops on the FPGA device.