To enable the design of large capacity memory structures, novel memory technologies such as non-volatile memory (NVM) and novel fabrication approaches, e.g., 3D stacking and multi-level cell (MLC) design have been explored. The existing modeling tools, however, cover only a few memory technologies, technology nodes and fabrication approaches. We present DESTINY, a tool for modeling 2D/3D memories designed using SRAM, resistive RAM (ReRAM), spin transfer torque RAM (STT-RAM), phase change RAM (PCM) and embedded DRAM (eDRAM) and 2D memories designed using spin orbit torque RAM (SOT-RAM), domain wall memory (DWM) and Flash memory. In addition to single-level cell (SLC) designs for all of these memories, DESTINY also supports modeling MLC designs for NVMs. We have extensively validated DESTINY against commercial and research prototypes of these memories. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g., latency, area or energy-delay product) for a given memory technology, choosing the suitable memory technology or fabrication method (i.e., 2D v/s 3D) for a given optimization target, etc. We believe that DESTINY will boost studies of next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers. The latest source-code of DESTINY is available from the following git repository: https://bitbucket.org/sparsh_mittal/destiny_v2.
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机译：为了能够设计大容量存储器结构，已经探索了诸如非易失性存储器（NVM）之类的新颖存储器技术和诸如3D堆叠和多层单元（MLC）设计之类的新颖制造方法。但是，现有的建模工具仅涵盖了几种存储技术，技术节点和制造方法。我们介绍了DESTINY，该工具用于建模使用SRAM，电阻RAM（ReRAM），自旋传递扭矩RAM（STT-RAM），相变RAM（PCM）和嵌入式DRAM（eDRAM）设计的2D / 3D存储器，以及使用自旋设计的2D存储器轨道扭矩RAM（SOT-RAM），域壁存储器（DWM）和闪存。除了用于所有这些存储器的单级单元（SLC）设计之外，DESTINY还支持对NVM进行MLC设计建模。我们已针对这些记忆的商业和研究原型广泛验证了DESTINY。 DESTINY对于跨多个维度执行设计空间探索非常有用，例如针对给定存储技术优化目标（例如，延迟，面积或能量延迟积），选择合适的存储技术或制造方法（例如2D） v / s 3D），等等。我们相信DESTINY将促进对从移动设备到超大型超级计算机等系统中使用的下一代内存体系结构的研究。最新的DESTINY源代码可从以下git存储库中获得：https：//bitbucket.org/sparsh_mittal/destiny_v2。
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