Méthode de prototypage virtuel permettant l'évaluation précoce de la consommation énergétique dans les systèmes intégrés sur puce

摘要

Technological trends towards high-level integration combined with the increasing operating frequencies, made embedded systems design become more and more complex.The increase in number of computing resources in integrated circuit (IC) led toover-constrained systems.In fact, SoC (System on Chip) designers must reduce overall system costs, including board space, power consumption and development time.Although many researches have developed methodologies to deal with the emerging requirements of IC design, few of these focused on the power consumption constraint.While the highest accuracy is achieved at the lowest level, estimation time increases significantly when we move down to lower levels.Early power estimation is interesting since it allows to widely explore the architectural design space during the system level partitioning and to early adjust architectural design choices.EDPE estimates power consumption at the system levels and especially CABA (Cycle Accurate Bit Accurate) and TLM (Transaction Level Modelling) levels.The EDPE have been integrated into SoCLib library.The main goal of EDPE (Early Design Power Estimation) is to compare the power consumption of different design partitioning alternatives and chooses the best trade-off power/ performance.Experimental results show that EDPE (Early Design Power Estimation) method provides fast, yet accurate, early power estimation for MPSoCs (MultiprocessorSystem on Chip).EDPE uses few parameters per hardware components and is based on homogeneous and easy characterization method.EDPE is easily generalized to any virtual prototyping library.